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MACHINE CODE INSTRUCTIONS


Instructions are patterns of Bit s with different patterns corresponding to different commands to the machine.

Every CPU model has its own machine code, or Instruction Set . Successor or derivative processor designs may completely include all the instructions of a predecessor and may add additional instructions. Some nearly completely compatible processor designs may have slightly different effects after similar instructions. Occasionally a successor processor design will discontinue or alter the meaning of a predecessor's instruction code, making migration of machine code between the two processors more difficult.

A machine code instruction set may have all instructions of the same length, or may have variable-length instructions. How the patterns are organized depends largely on the specification of the machine code. Common to most is the division of one field (the Opcode ) which specifies the exact operation (for example "add"). Other fields may give the type of the Operand s, their Location , or their value directly (operands contained in an instruction are called ''immediate'').
Some exotic instruction sets do not have an opcode field (such as Transport Triggered Architectures or the Forth Virtual Machine ), only operand(s).
Other instruction sets lack any operand fields, such as NOSC s {Link without Title} .


PROGRAMS

A program is a sequence of instructions that are executed by a CPU. While simple processors execute instructions one after the other, Superscalar processors are capable of executing several instructions at once.

Program Flow may be influenced by special ''jump'' Instructions that transfer execution to an instruction other than the following one. Conditional Jump s are taken (execution continues at another address) or not (execution continues at the next instruction) depending on some condition.


ASSEMBLY LANGUAGES

See Also: Assembly language


A much more readable rendition of machine language, called Assembly Language , uses Mnemonic Code s to refer to machine code instructions, rather than simply using the instructions' numeric values. For example, on the Zilog Z80 processor, the machine code 00000101, which causes the CPU to decrement the B Processor Register , would be represented in assembly language as DEC B.


EXAMPLE

The MIPS Architecture provides a specific example for a machine code whose instructions are always 32 bits long. The general type of instruction is given by the ''op'' (operation) field, the highest 6 bits. J-type (jump) and I-type (immediate) instructions are fully specified by ''op''. R-type (register) instructions include an additional field ''funct'' to determine the exact operation. The fields used in these types are:

6 5 5 5 5 6 bits