| Bus Mastering |
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In Computing , bus mastering is a feature supported by some Bus Architecture s that enables a controller connected to the bus to communicate directly with other devices on the bus without going through the CPU . Most modern bus architectures, including PCI , support bus mastering because it significantly improves performance for general purpose Operating System s. For Real-time Operating System s it is a problem because the scheduler can no longer see Interrupt s and can not schedule tasks depending on priority. The ''bus master'' is the device that drives the architectures allow other capable devices (or multiple CPUs) to take turns at controlling the bus. This allows a Network Controller Card , for example, to access a Disk Controller directly while the CPU performs other tasks which do not require the bus, such as fetching and executing code that does not reference memory from its instruction cache. Direct Memory Access (DMA) is a simple form of bus mastering where the I/O device is set up by the CPU to read from or write to one or more immediate blocks of memory and then signal to the CPU when it has done so. Full bus mastering (or "first-party DMA", "bus mastering DMA") implies that the I/O device is capable of performing more complex sequences of operations without CPU intervention. This will normally mean that the I/O device contains its own processor or Microcontroller . Any device can drive data onto the data bus when the CPU reads from that device, but only the bus master drives the address bus and control signals. |
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