| Addressing Mode |
Website Links For Addressing |
Information AboutAddressing Mode |
| CATEGORIES ABOUT ADDRESSING MODE | |
| computer architecture | |
| machine code | |
| assembly languages | |
| microprocessors | |
| addressing | |
|
In Computer Programming , addressing modes are primarily of interest to Compiler writers and to those who write code directly in Assembly Language . CAVEATS Note that there is no generally accepted way of naming the various addressing modes. In particular, different authors and computer manufacturers may give different names to the same addressing mode, or the same names to different addressing modes. Furthermore, an addressing mode which, in one given architecture, is treated as a single addressing mode may represent functionality that, in another architecture, is covered by two or more addressing modes. For example, some Complex Instruction Set Computer (CISC) computer architectures, such as the Digital Equipment Corporation (DEC) VAX , treat registers and Literal/immediate Constants as just another addressing mode. Others, such as the IBM System/390 and most Reduced Instruction Set Computer (RISC) designs, encode this information within the instruction. Thus, the latter machines have three distinct instruction codes for copying one register to another, copying a literal constant into a register, and copying the contents of a memory location into a register, while the VAX has only a single "MOV" instruction. The addressing modes listed below are divided into code addressing and data addressing. Most computer architectures maintain this distinction, but there are, or have been, some architectures which allow (almost) all addressing modes to be used in any context. The instructions shown below are purely representative in order to illustrate the addressing modes, and do not necessarily reflect the mnemonics used by any particular computer. USEFUL SIDE EFFECT Some processors, such as Intel X86 and the IBM/390, have a Load effective address instruction. This performs a calculation of the effective operand address, but instead of acting on that memory location, it loads the address that would have been accessed into a register. This can be useful when passing the address of an array element to a subroutine. It may also be a slightly sneaky way of doing more calculation than normal in one instruction; for example, using such an instruction with the addressing mode "base+index+offset" allows one to add two registers and a constant together in one instruction. HOW MANY ADDRESSING MODES? Different computer architectures vary greatly as to the number of addressing modes they provide. At the cost of a few extra instructions, and perhaps an extra register, it is normally possible to use the simpler addressing modes instead of the more complicated modes. It has proven much easier to design Pipelined CPUs if the only addressing modes available are simple ones. Most RISC machines have only about five simple addressing modes, while CISC machines such as the DEC VAX supermini have over a dozen addressing modes, some of which are quite complicated. The IBM System/360 mainframe had only three addressing modes; a few more have been added for the System/390 . When there are only a few addressing modes, the particular addressing mode required is usually encoded within the instruction code (e.g. IBM System/390, most RISC). But when there are lots of addressing modes, a specific field is often set aside in the instruction to specify the addressing mode. The DEC VAX allowed multiple memory operands for almost all instructions, and so reserved the first few bits of each operand specifier to indicate the addressing mode for that particular operand. Even on a computer with many addressing modes, measurements of actual programs indicate that the simple addressing modes listed below account for some 90% or more of all addressing modes used. Since most such measurements are based on code generated from high-level languages by compilers, this reflects to some extent the limitations of the compilers being used. SIMPLE ADDRESSING MODES FOR CODE Absolute + + --+ | ||
| jumpEQ Reg1 Reg2 Offset Jump Relative If Reg1 | reg2 |
|
| Mul Reg1 Reg2 Reg3 Reg1 : | reg2 reg3 |
|
| Add Reg1 Reg2 Constant Reg1 : | reg2 + constant |
|
|