Information AboutZilog Z80 |
| CATEGORIES ABOUT ZILOG Z80 | |
| microprocessors | |
|
Z80 in a QFP package.]] The Zilog Z80 is an 8-bit Microprocessor designed and sold by Zilog from July 1976 onwards. It was widely used both in desktop and Embedded Computer designs as well as for military purposes. The Z80 and its derivatives and clones make up one of the most commonly used CPU families of all time, and, along with the MOS Technology 6502 family, dominated the 8-bit microcomputer market from the late 1970s to the mid-1980s. Although Zilog made early attempts with advanced Mini-computer like versions of the Z80-architecture ( Z800 and Z280 ), these chips never caught on. The company was also trying hard in the Workstation market with its Z8000 and 32-bit Z80000 (both unrelated to Z80). In recent decades Zilog has refocused on the ever-growing market for Embedded Systems (for which the original Z80 and the Z180 were designed) and the most recent Z80-compatible Microcontroller family, the fully pipelined 24-bit EZ80 with a Linear 16 MB address range, has been successfully introduced alongside the simpler Z180 and Z80 products. Zilog released the Z80 Core to any company wishing to make the device Royalty Free . This enabled a small company's product to gain acceptance in the world market since Second Source s from far larger companies such as Toshiba started to manufacture the device. It could be argued that it was the first " Open Source " microprocessor and, as such, Zilog has made less than 50% of the Z80s since its conception. BRIEF HISTORY AND OVERVIEW The Z80 came about when Federico Faggin , after working on the 8080 , left Intel at the end of 1974 to found Zilog with Ralph Ungermann , and by July 1976 they had the Z80 on the market. It was designed to be binary compatible with the Intel 8080 so that most 8080 code could run unmodified on it, notably the CP/M Operating System . chip package pinout.]] The Z80 offered many real improvements over the 8080:
The Z80 quickly took over from the 8080 in the market, and became one of the most popular 8-bit CPUs. Perhaps a key to the success of the Z80 was the built-in DRAM Refresh , which allowed systems to be built with fewer support chips. A CMOS version was also developed and the specified maximum clock frequency''Margins are great, and most chips actually works well at significantly higher (such as 2x) clock frequencies than specified; memory speed has often been the real (physical) limiting factor up until the last 15 years or so, when cheaper and faster available memory chips changed this relation.'' increased succesively from 2.5 MHz up to 8 MHz for the original NMOS design, and up to 20 MHz for the CMOS version sold today, while immediate derivatives such as the Z180 and EZ80 today are specified for 33 and 50 MHz respectively. TECHNICAL DESCRIPTION Programming model and register set The programming model and register set are conventional and similar to many other processors, such as the related X86 family. The 8080 compatible registers AF,BC,DE,HL are ''duplicated'' as two separate banks in the Z80, where the processor can quickly switch from one bank to the other; a feature useful for speeding up responses to single level, high priority interrupts. This makes sense as the Z80 (like most microprocessors at the time) was really intended for Embedded use, not for personal computers, or the yet-to-be invented Home Computers .''According to one of the designers, Masatoshi Shima , the market focus was on high performance printers, high-end cash registers, and intelligent terminals.'' It also turned out to be quite useful for hard-optimized assembly coding. Some software, especially games for the ZX Spectrum took Z80 assembly optimization to rather extreme levels, employing the duplicated registers among other things. ''The 8080 compatible registers:''
''Registers introduced with the Z80:''
There is no ''direct'' access to the alternate registers, instead two special instructions, ''EX AF,AF' ''and ''EXX'', each toggles one of two multiplexer flipflops; this enables fast context switches for interrupt service routines: EX AF,AF' may be used alone (for really simple and fast interrupt routines) or together with EXX to swap the whole AF,BC,DE,HL set; still much faster than pushing the same registers on the stack (slower, lower priority, or multi level interrupts normally use the stack to store registers). The refresh register, '''R''', increments''While R is an 8 bit register, it wraps around at 128 instead of 256. If the programmer stores a value in the register, its high bit will be preserved regardless of what the CPU does to the remaining 7 bits. Incorrect implementation of this behaviour is a common source of problems when running games on emulated Z80-machines'' each time the CPU fetches an opcode (or opcode prefix) and has therefore no simple relationship with program execution. This has sometimes been used to generate Pseudorandom numbers in games, and also in software protection schemes. It has also been employed as a "hardware" counter in some designs; a famous example of this is the ZX81 , which lets it keep track of character positions on the TV screen by triggering an interrupt at wrap around (by connecting INT to A6). The interrupt vector register, '''I''', is used for the Z80 specific mode 2 interrupts (selected by the im 2 instruction). It supplies the base address for a 128-entry table of Service Routine addresses which are selected via a pointer sent to the CPU during an Interrupt Acknowledge cycle. The pointer identify a particular peripheral chip and/or peripheral function or event, where the chips are normally connected in a so called Daisy-chain for priority resolution. Like the refresh register, this register has also sometimes been used creatively. The Z80 assembly language Background - the Datapoint 2200 and Intel 8008 The first Intel 8008 assembly language was based on a very simple (but systematic) syntax inherited from the Datapoint 2200 design. This original syntax was later transformed into a new, somewhat more traditional, assembly language form for this same original 8008 chip. At about the same time, the new assembly language was also extended to accommodate the added addressing possibilities in the more advanced Intel 8080 chip (the 8008 and 8080 shared a language subset without being ''binary'' compatible; the 8008 actually was binary compatible with the Datapoint 2200 however). In this process, the mnemonic L, for ''LOAD'', was replaced by various abbreviations of the words ''LOAD'', ''STORE'' and ''MOVE'', intermixed with other symbolic letters. The mnemonic letter '''M''', for ''memory'' (referenced by HL), was lifted out from within the instruction mnemonic to become a syntactically freestanding ''operand'', while registers and combinations of registers became very inconsistently denoted; either by abbreviated operands (MVI D, LXI H etc), within the instruction mnemonic itself (LDA, LHLD etc), or both at the same time (LDAX B, STAX D etc). Datapoint 2200 & i8008 i8080 Z80 i8086 (ca -1973) (ca 1974) (1976) (1978) LBC MOV B,C LD B,C MOV BL,CL -- LDAX B LD A,(BC) MOV AL, {Link without Title} LAM MOV A,M LD A,(HL) MOV AL, {Link without Title} LBM MOV B,M LD B,(HL) MOV BL, {Link without Title} -- STAX D LD (DE),A MOV {Link without Title} ,AL LMA MOV M,A LD (HL),A MOV {Link without Title} ,AL LMC MOV M,C LD (HL),C MOV {Link without Title} ,CL LDI 56 MVI D,56 LD D,56 MOV DL,56 LMI 56 MVI M,56 LD (HL),56 MOV byte ptr {Link without Title} ,56 -- LDA 1234 LD A,(1234) MOV AL, {Link without Title} -- STA 1234 LD (1234),A MOV {Link without Title} ,AL -- -- LD B,(IX+56) MOV BL, {Link without Title} -- -- LD (IX+56),C MOV {Link without Title} ,CL -- -- LD (IY+56),78 MOV byte ptr {Link without Title} ,78 -- LXI B,1234 LD BC,1234 MOV BX,1234 -- LXI H,1234 LD HL,1234 MOV BP,1234 -- SHLD 1234 LD (1234),HL MOV {Link without Title} ,BP -- LHLD 1234 LD HL,(1234) MOV BP, {Link without Title} -- -- LD BC,(1234) MOV BX, {Link without Title} -- -- LD IX,(1234) MOV SI, {Link without Title} ''Illustration of four syntaxes, using samples of equivalent, or (for 8086) very similar, load and store instructions.'' The new syntax According to Masatoshi Shima , certain people within Zilog wanted a "computer oriented" image for the company, and also felt they needed to "differentiate" their first product from the 8080. Intel had also claimed copyright on their assembly mnemonics. Yet another assembly syntax was therefore developed, but this time with a more systematic approach:
These principles made it straightforward to find names and forms for all new Z80 instructions, as well as orthogonalizations of old ones, such as LD BC,(1234) above. It is interesting to see the resemblance between Z80 and 8086 syntax, as illustrated by the table. Apart from naming differences, and despite a certain discrepancy in basic register structure, the two are virtually isomorphous for a large portion of instructions. Whether this is due to some common influence on both design teams (above 8080 , such as PDP-11 ), the competitive nature of the relation between the two designs, or maybe just a matter of taste, is, so far, uncertain.''Surprisingly, only quite superficial similarities (such as the word MOV, or the letter X, for extended register) exists between the 8080 and 8086 assembly languages, despite the fact that 8080 programs can be compiled into x86 code (using a special assembler).'' Instruction set and encoding The Z80 uses 252 out of the available 256 codes as single byte opcodes; the four remaining codes are used extensively as opcode prefixes: CB and ED enable extra instructions and DD or FD selects IX+d or IY+d respectively (in some cases without displacement d) in place of HL. This scheme gives the Z80 a large number of permutations of instructions and registers; ZiLOG categorizes these into 158 different "instruction types", 78 of which are the same as those of the Intel 8080 (allowing operation of 8080 programs on a Z80). The ZiLOG documentation further groups instructions into the following categories:
The bit set, reset, and test instructions are well adapted to I/O control. No multiply instruction is available in the original Z80. Different sizes and variants of additions, shifts, and rotates have somewhat differing effects on flags because the flag-influencing properties of the 8080 had to be copied for compatibility. Load instructions do not affect the flags (except for the special purpose I and R register loads). The index register instructions are useful for reducing code size, and, while some of them are not much faster than "equivalent" sequences of simpler operations, they also save execution time indirectly by reducing the need to save and restore registers.''The 10-year-newer microcoded needs around 20 cycles to do the same thing using 8-bit operations. Using "typical" clocks of 4MHz versus 1MHz respectively (i.e. similarly fast memory chips), this translates into the Z80 being approximately seven times as fast as the 6502 for this particular operation (20/(11/4) ≈ 7).'' Undocumented instructions The index registers, IX and IY, were intended as flexible 16 bit pointers, enhancing the ability to manipulate memory, stack frames and data structures. Officially, they were treated as 16 bit only. In reality, they were implemented as a sort of copy of the HL register which is accessible as 16 bits or as a pair of 8 bit pair registers (H and L). Even the binary opcodes (machine language) were identical, but preceded by a new opcode prefix, as mentioned above. ZiLOG published the opcodes and related mnemonics for the intended functions, but did not document the fact that every opcode that allowed manipulation of the H and L registers was equally valid for the 8 bit portions of the IX and IY registers. As an example, the opcode 26h followed by an immediate byte value (LD H,n) will load that value into the H register. Preceding this two-byte instruction with the IX register's opcode prefix DD, would instead result in the most significant 8 bits of the IX register being loaded with that same value. ''There are several other undocumented instructions as well.'' Instruction execution As in all microprocessors, each instruction is divided into several steps which are usually termed machine cycles (M-cycles). Z80 needs between one and six M-cycles to execute a particular instruction as each M-cycle corresponds roughly to one memory access and/or internal operation. Many instructions actually end during the M1 of the ''next'' instruction which is known as a ''fetch/execute overlap''. ''Examples of typical instructions (R=read, W=write)'' ''Total'' ''M-cycles instruction M1 M2 M3 M4 M5 M6'' 1 INC BC opcode 2 ADD A,100 opcode 100 3 ADD HL,DE opcode internal internal 4 SET 5,(HL) prefix opcode R(HL), set W(HL) 5 LD (IX+102),103 prefix opcode 102 103,add W(IX+102) 6 INC (IY+104) prefix opcode 104 add R(IY+104),inc W(IY+104) The Z80 machine cycles are sequenced by an internal State Machine which builds each M-cycle out of 3,4,5 or 6 discrete steps (i.e. clock cycles) depending on context. This avoids cumbersome asynchronous logic and makes the control signals behave consistently at a wide range of clock frequencies. Naturally, it also means that a higher frequency crystal must be used than without this subdivision of machine cycles (approximately 2-3 times higher). It does not imply tighter requirements on memory access times however, as a high resolution clock allows more precise control of memory timings and memory therefore can be active ''in parallel with the CPU'' to a greater extent (i.e. sitting less idle), allowing more efficient use of available ''memory performance''. For instruction execution, the Z80 combines two full clock cycles into a long memory access period (the M1-signal) which would typically last only a fraction of a (longer) clock cycle in a more asynchronous design (such as the 6800 , or similar). Memory, especially EPROM , but also Flash , have since long been generally slow compared to the state machine sub-cycles (clock cycles) used in contemporary microprocessors. The shortest machine cycle that could safely be used in embedded designs has therefore often been limited by memory access times, not by the maximum CPU frequency (especially so during the home computer era). This relation has slowly changed during the recent decades, particularly regarding SRAM ; cacheless single cycle designs such as the EZ80 have therefore become much more meaningful recently. Compatible peripherals Zilog introduced a number of peripheral parts for the Z80, which all supported the Z80's interrupt handling system and I/O address space. These included the CTC (Counter-Timer-Circuit), the SIO (Serial Input Output), the DMA (Direct Memory Access), the PIO (Parallel Input-Output) and the DART (Dual Asynchronous Receiver Transmitter). As the product line developed, low-power, high-speed and CMOS versions of these chips were produced. In the same manner as the x86 family, but unlike contemporary 8-bit processors, like the Motorola 6800 and Mos Technology 6502, the Z80 and 8080 had a separate control line and address space for I/O instructions. While some Z80-based Computers used "Motorola-style" memory mapped input/output devices, usually the I/O space was used to address one of the many Zilog peripheral chips compatible with the Z80. Zilog I/O chips supported the Z80's new mode 2 interrupts (see description above) which simplified interrupt handling for large numbers of peripherals. Undocumented 16 bit I/O-addressing The Z80 was officially described as supporting 16 bit (64 KB) memory addressing, and 8 bit (256 ports) I/O-addressing. Looking carefully at the hardware reference manual, it can be seen that several I/O instructions, OUT (C),A for example, assert the contents of the entire 16 bit BC register to the address bus. An orthodox design would maybe decode the entire 16 bit address bus on I/O operations in order to take advantage of this feature, but it has also been used to minimize hardware requirements, see ZX81 . SECOND SOURCES, DERIVATIVES ETC. Second sources 's μPD780C Z80 clone on a ZX Spectrum board.]] 's LH0080A Z80 clone]] , a Soviet Z80 clone.]] Mostek MK3880 and SGS-Thomson Z8400 (now ST Microelectronics ) were both second-sources for the Z80. Sharp and NEC developed clones in NMOS , the LH-0080 and µPD780C respectively. Toshiba made a CMOS -version, the TMPZ84C00, which is believed (but not verified) to be the same design also used by Zilog for its own CMOS Z84C00. There were also Z80-chips marked GoldStar and LG . In East Germany , an unlicensed clone of the Z80, known as the U880 , was manufactured. It was very popular and was used in Robotron 's and VEB Mikroelektronik Mühlhausen's computer systems (e.g. the KC85 -series) and also in many self-made computer systems (ex. COMP JU+TER). In Romania another unlicensed clone could be found, named MMN80CPU and produced by Microelectronica , used in home computers like TIM-S, HC, COBRA. Also, several fully compatible clones of Z80 were created in the Soviet Union , notable ones being the КP1858ВМ1 (there was an unproven rumor that it contains the East-German U880 chip inside) and T34BM1 (this one contains a real Soviet chip inside). Another Soviet CPU, the КP580ИK80 (later marked as КP580ВМ80 ), was a clone of the Z80's predecessor, the Intel 8080. Derivatives ''Currently produced:''
''No longer produced:''
FPGA and ASIC versions A commercial, functionally equivalent, CPU core is the Evatronix CZ80CPU, available as synthesizable VHDL or Verilog source code, for high volume ASIC s, or as post-synthesis EDIF Netlist s, for low volume FPGA s from Actel , Altera , Lattice or Xilinx . Free versions are the T80 and TV80, available as VHDL and Verilog sources under a BSD style license. The VHDL version, once synthesized, can be clocked up to 35 MHz on a Xilinx Spartan II FPGA . For large production series, it's much cheaper to use a traditional solution (or ASIC) than an FPGA, however. Software emulation Software Emulation of the Z80 instruction set on modern PCs runs faster than the original Z80 CPU ran and is used for Home Computer Simulator s (such as ZX Spectrum and Amstrad CPC ) and also for video game emulators such as MAME , which executes 1980s vintage video games. SIMH emulates MITS Altair 8800 computer, both Intel 8080 and Zilog Z80 versions. NOTABLE USES In desktop computers During the late 1970s and early 1980s, the Z80 was used in a great number of fairly anonymous business-oriented machines with the CP/M operating system; a CPU/OS combination that dominated the market in much the same way that Windows based Intel -machines do Today . Two well-known examples of Z80+CP/M business computers are the portable Osborne 1 and the Kaypro series. Research Machines manufactured the 380Z and 480Z microcomputers which were networked with a thin Ethernet type LAN and CP/NET in 1981. Other manufacturers of such systems included Televideo , Xerox and a number of more obscure firms. Some systems used multi-tasking operating system software to share the one processor between several concurrent users. Home Computer s using the Z80 (or equivalent) include the following:
''For a comprehensive overview, see the List Of Home Computers Using The Z80 .''
In embedded systems and consumer electronics The Zilog Z80 has long been a popular microprocessor in Embedded System s and Microcontroller cores, where it remains in widespread use today. The following list provides examples of such applications of the Z80, including uses in Consumer Electronic s products. Industrial/professional:
Consumer electronics:
Musical instruments etc:
SEE ALSO ARTICLES ABOUT THE Z80 MICROPROCESSOR Articles about Z80 architecture |
|
|