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Zilog Z280




The Zilog Z280 was an enhancement of the Zilog Z80 architecture introduced in July 1987 , basically a slighly improved CMOS version of the earlier NMOS Zilog Z800 , both versions were commercial failures. They added a Memory Management Unit (MMU) to expand the addressing range to 16 MB , features for Multitasking and Multiprocessor and Coprocessor configurations, a 256 byte cache, and a huge number of new Instruction s and addressing modes (giving a total of over 2000 combinations). Its internal Clock Signal ran at 2 or 4 times the external clock's speed (e.g. a 16 MHz CPU with a 4MHz Bus ). Later, more successful, enhancements to the Z80 -architecture include Hitachi HD64180 and Zilog EZ80 , among others. See further Zilog Z800 .