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Virtual Memory




Virtual Memory is an addressing scheme implemented in hardware and software that allows non-contiguous memory to be addressed as if it were contiguous. All current implementations of virtual memory support two Operating System features:

# Memory can be addressed that does not currently reside in main memory and the hardware and Operating System will load the required memory from auxiliary storage automatically, without any knowledge of the program addressing the memory, thus allowing a program to reference more ( RAM ) memory than actually exists in the computer.
# A Multi-tasking system can provide total memory isolation, also known as a "discrete address space," to every task (except the lowest level operating system.) Isolation increases reliability by isolating faults within a specific task and preventing problems in one task from interrupting other tasks.


OVERVIEW

Hardware must have two methods of addressing RAM, real and virtual.
  • In real mode, memory address registers contain an integer that addresses a word or byte of RAM. The memory is addressed sequentially: if a program increments the address register by ''n'', the location of the memory being addressed moves forward by ''n''.

  • In virtual mode, memory is divided into pages, usually 4096 bytes long (see Page Size ). These pages may reside in any available RAM location that can be addressed in virtual mode. Memory address registers are divided into an index and an offset: the high-order bits represent the index, and the lower-order bits represent the offset. The index is an offset within the page-mapping table (which resides at a known address in memory), each of whose entries contains the starting real addresses of the corresponding page. The offset represents a location within the page specified by the offset, and can range from 0 to 1 less than the page size (with a page size of 4096, between 0 and 4095). The virtual address is resolved by looking up the index in the page table -- yielding a physical page address -- and then adding the offset to the physical address.


The size of the tables is governed by the architecture and amount of RAM. All virtual addressing schemes require the page tables to start at either a fixed location or one identified by a register.
In a typical computer, the first table is an array of addresses, each of which denotes the start of the next array. The index into the first array is determined by certain high-order bits of the contents of the memory address register. Depending on the architecture, each array entry can be any size the computer can address. The next bits in the memory address register are an index into the array denoted by the first index. This set of arrays of arrays can be repeated, limited by the size of the memory address register.
The number of tables and the size of the tables vary by architecture, but the overall goal of virtual addressing is to transform the high order bits of the virtual address in the memory address register into an entry in the page table that either points to the location of the page in physical memory or to a flag that indicates the page is not available.


Paging


If a program references a memory location within a Virtual Page that is not available, the hardware generates a Page Fault . When this occurs, the memory management hardware invokes an operating system routine that loads the required page from auxiliary storage (''e.g.'', a paging file on disk) and turns on the flag that indicates the page is available. The hardware then adds the offset denoted by the low-order bits in the address register to the start location of the physical page, accesses the requested memory location, and returns control to the application that originally tried to access the memory. This process takes place transparently to the application addressing the memory. This scheme is called Paging .


Translating the memory addresses


To minimize the performance penalty of address translation, most modern CPUs include an on-chip Memory Management Unit (MMU) and maintain a table of recently used virtual-to-physical translations, called a Translation Lookaside Buffer (TLB). Translating an address that has an entry in the TLB requires no additional memory reference (and therefore time). However, the TLB can only contain a limited number of mappings between virtual and physical addresses. When the translation for the requested address is not resident in the TLB, the hardware will have to perform the translation and load the result into the TLB.

On some processors, address translation is performed entirely in hardware; the MMU has to make additional memory references to load the required translations from the translation tables, but no other action is needed. In other processors, assistance from the operating system is needed: the hardware raises an exception, and the operating system handles it by replacing a TLB entry with an entry from the primary translation table, and the instruction that made the original memory reference is restarted.


Protected memory


Hardware that supports virtual memory almost always supports Memory Protection mechanisms as well. The MMU may have the ability to vary its operation according to the type of memory reference (for read, write or execution) and the Privilege Mode of the CPU at the time the memory reference was made. This allows the operating system to protect its own code and data (such as the translation tables used for virtual memory) from corruption by an erroneous or malicious application program, and to protect application programs from each other and (to some extent) from themselves (e.g. by preventing writes to areas of memory that contain code).


HISTORY

Before the development of the virtual memory technique, programmers in the 1940s and 1950s had to manage two-level storage (main memory or RAM, and secondary memory in the form of Hard Disks or earlier, Magnetic Drum s) directly. For example, using Overlaying techniques.

Virtual memory was developed in approximately 1959–1962, at the University Of Manchester for the Atlas Computer , completed in 1962. However, Fritz-Rudolf Güntsch, one of Germany's pioneering computer scientists and later the developer of the Telefunken TR 440 mainframe, claims to have invented the concept in his doctoral dissertation ''Logischer Entwurf eines digitalen Rechengerätes mit mehreren asynchron laufenden Trommeln und automatischem Schnellspeicherbetrieb'' (Logic Concept of a Digital Computing Device with Multiple Asynchronous Drum Storage and Automatic Fast Memory Mode) in 1957.

In 1961, Burroughs released the B5000 , the first commercial computer with virtual memory.

  Authorlink Peter Denning
  Last Denning
  First Peter
  Title Before Memory was Virtual
  Journal In the Beginning: Recollections of Software Pioneers
  Year 1997






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