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INTRODUCTION The X86 Instruction Set has undergone numerous changes over time. Most of them were to add new functionality to the instruction set. X86 INTEGER INSTRUCTIONS This is the full 8086-8088 instruction set, but most, if not all of these instructions are available in 32-bit mode, they just operate on 32 bit registers (eax, ebx, etc) and values instead of their 16-bit (ax, bx, etc) counterparts. See also X86 Assembly Language for a quick tutorial for this chip. Original 8086/8088 instructions Added in specific processors Added with 80186/80188 BOUND, ENTER, INSB, INSW, LEAVE, OUTSB, OUTSW, POPA, PUSHA, PUSHW Added with 80286 ARPL, CLTS, LAR, LGDT, LIDT, LLDT, LMSW, LOADALL , LSL, LTR, SGDT, SIDT, SLDT, SMSW, STR, VERR, VERW Added with 80386 BSF, BSR, BT, BTC, BTR, BTS, CDQ, CMPSD, CWDE, INSD, IRETD, IRETDF, IRETF, JECXZ, LFS, LGS, LODSD, LOOPD, LOOPED, LOOPNED, LOOPNZD, LOOPZD, LSS, MOVSD, MOVSX, MOVZX, OUTSD, POPAD, POPFD, PUSHAD, PUSHD, PUSHFD, SCASD, SETA, SETAE, SETB, SETBE, SETC, SETE, SETG, SETGE, SETL, SETLE, SETNA, SETNAE, SETNB, SETNBE, SETNC, SETNE, SETNG, SETNGE, SETNL, SETNLE, SETNO, SETNP, SETNS, SETNZ, SETO, SETP, SETPE, SETPO, SETS, SETZ, SHLD, SHRD, STOSD Added with 80486 BSWAP, CMPXCHG, CPUID, INVD, INVLPG, RSM, WBINVD, XADD Added with Pentium
Added with Pentium Pro CMOVA, CMOVAE, CMOVB, CMOVB, CMOVE, CMOVG, CMOVGE, CMOVL, CMOVLE, CMOVNA, CMOVNAE, CMOVNB, CMOVNBE, CMOVNC, CMOVNE, CMOVNG, CMOVNGE, CMOVNL, CMOVNLE, CMOVNO, CMOVNP, CMOVNS, CMOVNZ, CMOVO, CMOVP, CMOVPE, CMOVPO, CMOVS, CMOVZ Added with Pentium II SYSENTER, SYSEXIT Added with AMD K7 SYSCALL, SYSRET Added with Pentium III ''as part of the SSE Branding '' MASKMOVQ, MOVNTPS, MOVNTQ, PREFETCH0, PREFETCH1, PREFETCH2, PREFETCHNTA, SFENCE (for Cacheability and Memory Ordering) Added with Pentium 4 ''as part of the SSE2 branding'' CLFLUSH, LFENCE, MASKMOVDQU, MFENCE, MOVNTDQ, MOVNTI, MOVNTPD, PAUSE (for Cacheability) Added with Pentium 4 supporting SSE3 ''only on processors supporting Hyper-threading '' ''as part of the SSE3 branding'' MONITOR, MWAIT (for Thread synchronization) Added with Pentium 4 6x2 VMPTRLD, VMPTRST, VMCLEAR, VMREAD, VMWRITE, VMCALL, VMLAUNCH, VMRESUME, VMXOFF, VMXON ( VMX instructions of VT ) Added with X86-64 CMPXCHG16B X87 FLOATING POINT INSTRUCTIONS Original 8087 instructions F2XM1, FABS, FADD, FADDP, FBLD, FBSTP, FCHS, FCLEX, FCOM, FCOMP, FCOMPP, FDECSTP, FDISI, FDIV , FDIVP, FDIVR, FDIVRP, FENI, FFREE, FIADD, FICOM, FICOMP, FIDIV, FIDIVR, FILD, FIMUL, FINCSTP, FINIT, FIST, FISTP, FISUB, FISUBR, FLD, FLD1, FLDCW, FLDENV, FLDENVW, FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI, FLDZ, FMUL, FMULP, FNCLEX, FNDISI, FNENI, FNINIT, FNOP, FNSAVE, FNSAVEW, FNSTCW, FNSTENV, FNSTENVW, FNSTSW, FPATAN, FPREM, FPTAN, FRNDINT, FRSTOR, FRSTORW, FSAVE, FSAVEW, FSCALE, FSQRT, FST, FSTCW, FSTENV, FSTENVW, FSTP, FSTSW, FSUB, FSUBP, FSUBR, FSUBRP, FTST, FWAIT, FXAM, FXCH, FXTRACT, FYL2X, FYL2XP1 Added in specific processors Added with 80287 FSETPM Added with 80387 FCOS, FLDENVD, FNSAVED, FNSTENVD, FPREM1, FRSTORD, FSAVED, FSIN, FSINCOS, FSTENVD, FUCOM, FUCOMP, FUCOMPP Added with Pentium Pro FCMOVB, FCMOVBE, FCMOVE, FCMOVNB, FCMOVNBE, FCMOVNE, FCMOVNU, FCMOVU, FCOMI, FCOMIP, FUCOMI, FUCOMIP, FXRSTOR, FXSAVE Added with Pentium 4 supporting SSE3 ''as part of the SSE3 branding'' FISTTP (x87 to integer conversion) SIMD INSTRUCTIONS MMX instructions ''added with Pentium MMX '' EMMS, MOVD, MODQ, PACKSSDW, PACKSSWB, PACKUSWB, PADDB, PADDD, PADDSB, PADDSW, PADDUSB, PADDUSW, PADDW, PAND, PANDN, PCMPEQB, PCMPEQD, PCMPEQW, PCMPGTB, PCMPGTD, PCMPGTW, PMADDWD, PMULHW, PMULLW, POR, PSLLD, PSLLQ, PSLLW, PSRAD, PSRAW, PSRLD, PSRLQ, PSRLW, PSUBB, PSUBD, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBW, PUNPCKHBW, PUNPCKHDQ, PUNPCKHWD, PUNPCKLBW, PUNPCKLDQ, PUNPCKLWD, PXOR MMX+ instructions ''added with 6x86MX from Cyrix ; supported on other CPUs too, i.e. Extended MMX on Athlon 64 '' 3DNow! instructions ''added with K6-2 '' FEMMS, PAVGUSB, PF2ID, PFACC, PFADD, PFCMPEQ, PFCMPGE, PFCMPGT, PFMAX, PFMIN, PFMUL, PFRCP, PFRCPIT1, PFRCPIT2, PFRSQIT1, PFRSQRT, PFSUB, PFSUBR, PI2FD, PMULHRW, PREFETCH, PREFETCHW 3DNow!+ instructions ''added with Athlon '' PF2IW, PFNACC, PFPNACC, PI2FW, PSWAPD SSE instructions ''added with Pentium III '' ''also see integer instruction added with Pentium III''
SSE2 instructions ''added with Pentium 4 '' ''also see integer instructions added with Pentium 4''
SSE3 instructions ''added with Pentium 4 SSE3'' ''also see integer and floating-point instructions added with Pentium 4 SSE3''
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