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Information About

Translation Lookaside Buffer




The TLB references physical memory addresses in its table. The TLB may reside between the CPU and the Cache , or between the Cache and Primary Storage . This depends on whether the cache is using virtual addressing or physical addressing.

If the cache is virtually addressed, requests are sent directly from the CPU to the cache, which then accesses the TLB as necessary. If the cache is physically addressed, the CPU does a TLB lookup on every memory operation, and the resulting physical address is sent to the cache. There are pros and cons to both implementations.

A common optimization for physically-addressed caches is to perform the TLB lookup in parallel with the cache access. The low-order bits of any virtual address (e.g., in a section in the Cache article for more details about virtual addressing as it pertains to caches and TLBs.


MISS

When a TLB miss occurs, two schemes are commonly found in modern architectures. With hardware TLB management, the CPU itself walks the Page Table s to see if there is an entry for the specified virtual memory address. If there is, the entry is brought into the TLB and the TLB access is retried (this can get complicated depending on whether it was a data or instruction TLB miss). If there is no entry in the page table, a Page Fault Exception occurs, and the Operating System must bring the required data into memory. With software-managed TLBs, a TLB miss generates a "TLB miss" Exception , and the Operating System must walk the page tables and perform the translation in software. The operating system then loads the translation into the TLB and restarts the program from the instruction that caused the TLB miss.


TYPICAL STATISTICS

:Size: 8 - 4,096 entries
:Hit time: 0.5 - 1 clock cycle
:Miss penalty: 10 - 30 clock cycles
:Miss rate: 0.01% - 1%

  • .99 +30---.01 = 1.29 clock cycles per memory access.



COMPUTER SECURITY

Although not intended by design, if system security has been breached, a Rootkit may use the translation lookaside buffer to alter the view of memory in order to hide a subversive program or backdoor on a computer.