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MACHINE CODE INSTRUCTIONS The "words" of a machine Instructions are patterns of Bit s with different patterns corresponding to different commands to the machine. Every CPU model has its own machine code, or Instruction Set , although there is considerable overlap between some. If CPU ''A'' understands the full language of CPU ''B'' it is said that ''A'' is compatible with ''B''. CPU ''B'' may not be compatible with CPU ''A'', as ''A'' may know a few codes that ''B'' does not. Some machine languages give all their instructions the same number of bits, while the instruction length differs in others. How the patterns are organised depends largely on the specification of the machine code. Common to most is the divisionof one field (the Opcode ) specifies the exact operation (for example "add"). Other fields may give the type of the Operand s, their Location , or their value directly (operands contained in an instruction are called ''immediate''). Some exotic instruction sets do not have an opcode field (such as Transport Triggered Architectures or the Forth Virtual Machine ), only operand(s). Other instruction sets lack any operand fields, such as NOSC s") {Link without Title} . PROGRAMS A program is a sequence of instructions that are executed by a CPU. While simple processors execute instructions one after the other, Superscalar processors are capable of executing several instructions at once. Program Flow may be influenced by special ''jump'' instructions that transfer execution to an instruction other than the following one. Conditional Jump s are taken (execution continues at another address) or not (execution continues at the next instruction) depending on some condition. ASSEMBLY LANGUAGES Humans use Mnemonic Code s to refer to machine code instructions. Such a more readable rendition of the machine language is called an Assembly Language and consists of both Binary Numbers and simple words whereas ''machine code'' is composed only of the two binary digits 0 and 1. For example, on the Zilog Z80 processor, the machine code 00000101 causes the CPU to decrement the B Processor Register . In assembly language this would be written as DEC B.EXAMPLE The MIPS Architecture provides a specific example for a machine code whose instructions are always 32 bits long. The general type of instruction is given by the ''op'' (operation) field, the highest 6 bits. J-type (jump) and I-type (immediate) instructions are fully specified by ''op''. R-type (register) instructions include an additional field ''funct'' to determine the exact operation. The fields used in these types are: 6 5 5 5 5 6 bits |
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