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The metal oxide semiconductor field-effect transistor (MOSFET), is by far the most common Field-effect Transistor in both Digital and Analog circuits.
The MOSFET is composed of a channel of N-type or P-type semiconductor material (see article on Semiconductor Device s), and is accordingly called an NMOSFET or a PMOSFET.

The 'metal' in the name is an anachronism from early chips in which the gates were metal; modern chips use Polysilicon gates. IGFET is a related, more general term meaning '''insulated-gate field-effect transistor''', and is almost synonymous with "MOSFET", though it can refer to FETs with a gate insulator that is not oxide. Some prefer to use "IGFET" when referring to devices with polysilicon gates, but most still call them MOSFETs.

Usually the semiconductor of choice is Silicon , but some chip manufacturers, most notably IBM , have begun to use a mixture of Silicon and Germanium () in MOSFET channels. Unfortunately, many semiconductors with better electrical properties than silicon, such as Gallium Arsenide , do not form good gate oxides and thus are not suitable for MOSFETs.

The gate terminal is a layer of Polysilicon (polycrystalline silicon; why polysilicon is used will be explained below) placed over the channel, but separated from the channel by a thin insulating layer of what was traditionally silicon dioxide, but more advanced technologies used silicon oxynitride. When a voltage is applied between the gate and source terminals, the electric field generated penetrates through the oxide and creates a so-called "inversion channel" in the channel underneath. The inversion channel is of the same type — P-type or N-type — as the source and drain, so it provides a conduit through which current can pass. Varying the voltage between the gate and body modulates the Conductivity of this layer and makes it possible to control the current flow between drain and source.


CIRCUIT SYMBOLS


A variety of symbols are used for the MOSFET. The basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back into the same direction as the channel. Sometimes a broken line is used for enhancement mode and a solid one for depletion mode, but the awkwardness of drawing broken lines means this distinction is often ignored. Another line is drawn parallel to the channel for the gate.

The bulk connection, if shown, is shown connected to the back of the channel with an arrow indicating PMOS or NMOS. Arrows always point from P to N, so an NMOS (N-channel) has the arrow pointing in. If the bulk is connected to the source (as is generally the case with discrete devices) it is angled to meet up with the source leaving the transistor. If the bulk is not shown (as is often the case in IC design as they are generally common bulk) an inversion symbol is sometimes used to indicate PMOS.

Comparison of enhancement and depletion mode symbols, along with JFET symbols:


MOSFET OPERATION


Metal Oxide Semiconductor structure


A Metal Oxide Semiconductor (MOS) structure is obtained by depositing a layer of Silicon Dioxide (2) and a layer of metal ( Polycrystalline Silicon is actually used instead of metal) on top of a semiconductor die. As the silicon dioxide is a Dielectric material its structure is equivalent to a plane Capacitor , with one of the electrodes replaced by a semiconductor.

When a voltage is applied across a MOS structure, it modifies the distribution of charges in the semiconductor. If we consider a P-type semiconductor (with N_A the density of holes), a positive V_{GB} (see figure) tends to reduce the concentration of holes and increase the concentration of electrons. If V_{GB} is high enough, the concentration of negative charge carriers is more than that of positive charges.


MOSFET structure


A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is based on the modulation of charge concentration caused by a MOS capacitance. It is basically constituted of two electrodes (source and drain) each connected to a highly doped N region. These two regions are separated by a P-doped zone. This latter zone constitutes a MOS capacitance with a third electrode (the gate), located above.

When a positive Gate-Body voltage is applied, it creates an ''N-channel'' at the surface of the P region, just under the oxide. This channel spreads from the source to the drain and provides conductivity of the transistor. When no or a negative voltage is applied between gate and body, the channel disappears and no current can flow between the source and the drain.


Body effect

The body effect describes the changes in the Threshold Voltage by the change in the source-bulk voltage, using the following equation.

V_{TN} = V_{TO} + \gamma (\sqrt(V_{SB} + 2\phi) + \sqrt(2\phi)),

where V_{TO} is the zero Substrate Bias , \gamma is the body effect parameter, and 2\phi is the surface Potential parameter.

The body can be operating as a second gate. (http://equars.com/~marco/poli/phd/node20.html)


Modes of operation


The operation of a MOSFET can be separated into three different modes, depending on the voltages at the terminals.
For an enhancement mode, n-channel MOSFET the modes are:

; Cut-off or sub-threshold mode
: When V_{GS} < V_{th} where V_{th} is the Threshold Voltage of the device.
: The transistor is turned off, and there is no conduction between drain and source. While the current between drain and source should ideally be zero since the switch is turned off, there is a weak-inversion current, or Subthreshold Leakage .

; Triode or linear region
: When V_{GS} > V_{th} and V_{DS} < V_{GS} - V_{th}
: The transistor is turned on, and a channel has been created which allows current to flow between the drain and source. The MOSFET operates like a resistor, controlled by the gate voltage. The current from drain to source is:
:: I_D= rac{\mu_n C_{ox}}{2} rac{W}{L}(2(V_{GS}-V_{th})V_{DS}-V_{DS}^2)

: where \mu_n is the charge-carrier mobility, W is the gate width, L is the gate length and C_{ox} is the capacitance at the gate.

; Saturation: When V_{GS} > V_{th} and V_{DS} > V_{GS} - V_{th}
: The switch is turned on, and a channel has been created which allows current to flow between the drain and source. Since the drain voltage is higher than the gate voltage, a portion of the channel is turned off. The onset of this region is also known as pinch-off. The drain current is now relatively independent of the drain voltage (in a First-order Approximation ) and the current is only controlled by the gate voltage such that:
:: I_D = rac{\mu_n C_{ox}}{2} rac{W}{L}(V_{GS}-V_{th})^2

: this equation can be multiplied by (1+\lambda V_{DS}) to take into account the channel length modulation (\lambda).

In Digital Circuits MOSFETs are operated in cut-off and linear mode. The saturation mode is mainly used in Analog Circuit applications.


THE PRIMACY OF MOSFETS


In 1960, Martin Atalla at Bell Labs invented the metal oxide semiconductor field-effect transistor (MOSFET). Theoretically different from Shockley 's transistor, the MOSFET was structured by putting an insulating layer on the surface of the semiconductor and then placing a metallic gate electrode on that. It used crystalline Silicon for the semiconductor and a thermally oxidized layer of Silicon Dioxide for the insulator. Not only did it possess such technical attractions as low cost of production and ease of integration, the silicon MOSFET serendipitously did not generate localized electron traps ( Interface States ) at the interface between the silicon and its native oxide layer, and thus was free of the characteristic that had impeded the performance of earlier transistors. Buoyed by this stroke of good fortune, the MOSFET has achieved electronic hegemony. It is this serendipity that sustains the Large-scale Integrated Circuits (LSIs) underlying today's information society.

The growth of digital technologies like the Microprocessor has provided the motivation to advance MOSFET technology faster than any other type of silicon-based transistor. The principal reason for the success of the MOSFET was the development of digital CMOS logic, (''see article on CMOS '') which uses p- and n-channel MOSFETs as building blocks. The great advantage of CMOS logic is that they allow no current to flow (ideally), and thus no Power to be consumed, except when the inputs to Logic Gate s are being switched. CMOS accomplishes this by complementing every nMOSFET with a pMOSFET and connecting both gates in such a way that whenever one is conducting, the other is not. This arrangement greatly reduces power consumption and heat generation. Overheating is a major concern in Integrated Circuit s, since ever more transistors are packed into ever smaller chips.

Another advantage of MOSFETs for digital switching is that the oxide layer between the gate and the channel prevents DC current from flowing through the gate, further reducing power consumption and giving a very large input impedance. The insulating oxide between the gate and channel effectively isolates a MOSFET in one logic state from earlier and consequent stages, which allows to drive a considerable number of MOSFET inputs from a single MOSFET output. Bipolar transistor-based logics (such as TTL) do not have such a high fanout capacity. This isolation also makes it easier for the designers to ignore to some extent loading effects between logic stages independently. That extent is defined by the operating frequency: as frequencies increase, the input impedance of the MOSFETs decreases.

The MOSFET's strengths as the workhorse Transistor in most Digital Circuit s do not translate into supremacy in Analog Circuit s. The Bipolar Junction Transistor (BJT) has traditionally been the analog designer's transistor of choice, due largely to its high Transconductance and unique properties. Nevertheless, MOSFETs are widely relied upon for analog purposes as well. One advantage of MOSFETs is that due to their positive temperature coefficient, they do not suffer from thermal runaway as BJTs do. Some analog circuits are designed solely using MOSFETs in a Fabrication process specialized for digital circuits because it is advantageous to incorporate digital and analog circuits onto the same chip and digital fabrication processes are less expensive. Fabrication processes exist that incorporate BJTs and MOSFETs onto the same Die , these mixed-transistor circuits are called BiCMOS (bipolar-CMOS) circuits. The BJT also has some advantages over the MOSFET in certain digital circuits; digital circuit designs can incorporate BJTs to speed signals in critical locations.


MOSFET SCALING


Over the past decades, the MOSFET has continually been scaled down in size; typical MOSFET channel lengths were once several Micrometre s, but modern Integrated Circuit s are incorporating MOSFETs with channel lengths of less than a tenth of a micrometre. Indeed Intel will begin production of a process featuring a 65 nm feature size (with the channel being even shorter) in early 2006. Until the late 1990s, this size reduction resulted in great improvement to MOSFET operation with no deleterious consequences. Historically, the difficulties with decreasing the size of the MOSFET have been associated with the Semiconductor Device Fabrication process.


Reasons for MOSFET scaling:


Smaller MOSFETs are desirable for three reasons. First, smaller MOSFETs allow more current to pass. Conceptually, MOSFETs are like Resistor s in the on-state, and shorter resistors have less resistance. Second, smaller MOSFETs have smaller gates, and thus lower gate Capacitance . These first two factors contribute to lower switching times, and thus higher processing speeds. A third reason for MOSFET scaling is reduced area, leading to reduced cost. Smaller MOSFETs can be packed more densely, resulting in either smaller chips or chips with more computing power in the same area. Because the cost of fabricating a Semiconductor Wafer is relatively fixed, the cost of the individual Integrated Circuit s is mainly related to the number of chips that can be produced per wafer. Hence, smaller ICs allow more chips per wafer, reducing the price per chip.


Difficulties arising due to MOSFET scaling

Producing MOSFETs with channel lengths smaller than a Micrometre is a challenge, and the difficulties of semiconductor device fabrication are always a limiting factor in advancing integrated circuit technology. Recently, the small size of the MOSFET has created operational problems.


Subthreshold leakage

Because of small MOSFET geometries, the voltage that can be applied to the gate must be reduced to maintain reliability. To maintain performance, the Threshold Voltage of the MOSFET has to be reduced as well. As threshold voltage is reduced, the transistor cannot be completely turned off, resulting in a weak-inversion layer which consumes power in the form of Subthreshold Leakage when the transistor should not be conducting. Subthreshold leakage, which was ignored in the past, now can consume upwards of half of the total power consumption of the chip.


Interconnect capacitance

Traditionally switching time was roughly proportional to the gate capacitance of gates. However, with transistors becoming smaller and more transistors being placed on the chip, Interconnect capacitance (the capacitance of the wires connecting different parts of the chip) is becoming a large percentage of capacitance. Signals have to travel through the interconnect, which leads to increased delay and lower performance.


Heat production

The ever-increasing density of MOSFETs on an integrated circuit is creating problems of substantial localized heat generation that can impair circuit operation. Circuits operate slower at high temperatures, and have reduced reliability and shorter lifetimes. Heat sinks and other cooling methods are now required for many integrated circuits including microprocessors.

Power MOSFETs are at risk of Thermal Runaway . As their on-state resistance rises with temperature, the power loss on the junction rises correspondingly, generating further heat. When the heatsink is not able to keep the temperature low enough, the junction temperature may quickly and uncontrollably rise, resulting in destruction of the device.


Gate oxide leakage

The gate oxide, which serves as insulator between the gate and channel, should be made as thin as possible to increase the channel conductivity and performance when the transistor is on and to reduce subthreshold leakage when the transistor is off. However, with current gate oxides with a thickness of around 1.2 Nm (which in silicon is ~5 Atom s thick) the phenomenon of Tunneling leakage occurs between the gate and channel, leading to increased power consumption.

Insulators (referred to as High-k Dielectrics ) that have a larger Dielectric Constant than Silicon Dioxide , such as group IVb metal silicates e.g. Hafnium and Zirconium silicates and oxides, are now being researched to reduce the Gate Leakage . Increasing the dielectric constant of the gate oxide material allows a thicker layer while maintaining a high capacitance. The higher thickness reduces the tunneling current between the gate and the channel. An important consideration is the barrier height of the new gate oxide; the difference in Conduction Band energy between the semiconductor and the oxide (and the corresponding difference in Valence Band energy) will also affect the leakage current level. For the traditional gate oxide, silicon dioxide, the former barrier is approximately 8 EV . For many alternative dielectrics the value is significantly lower, somewhat negating the advantage of higher dielectric constant.


Process variations

With MOSFETS becoming smaller, the number of atoms in the silicon that produce many of the transistor's properties is becoming fewer. During chip manufacturing, random process variation can affect the size of the transistor, which becomes a greater percentage of the overall transistor size as the transistor shrinks. The transistor characteristics become less deterministic, but more statistical. This statistical variation increases design difficulty.


MOSFET CONSTRUCTION



Gate material


The primary criterion for the gate material is that it is a good Conductor . Highly-doped Polycrystalline Silicon is an acceptable, but certainly not ideal conductor, and it also suffers from some more technical deficiencies in its role as the standard gate material. There are a few reasons why polysilicon is preferable to a metal gate: