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Intel Core is a new platform umbrella intended to replace the Pentium M brand. It is part of a major Rebranding effort by Intel starting January 2006. The first chip in this brand is codenamed '''Yonah''' ( Hebrew transliteration for Jonah - יונה) and was released on January 5 2006 . YONAH Yonah was the code name for Intel 's first generation of 65 Nm process mobile microprocessors, based on the Banias/Dothan Pentium M microarchitecture, incorporating LaGrande security technology. SIMD performance has been improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations, while integer performance decreased slightly due to higher latency cache. Additionally, Yonah includes support for the XD Bit . Core Duo is the world's first low-power (less than 25 watts) Dual Core processor, with the previous low being the Opteron 260 and 860 HE at 55 watts. Core Duo was released on 5 January 2006, with the other components of the Napa platform. It is the first Intel processor to be used in Apple Macintosh products (the Apple Developer Transition Kit machines, non-production units distributed to some developers, used Pentium 4 processors). Contrary to earlier reports, the Intel Core Duo supports Intel's Vanderpool virtualization technology, as indicated by the Intel Centrino Duo Mobile Technology Performance Brief . However, it seems some vendors have chosen to disable this feature by default, making it available through a BIOS option. EM64T (Intel x86-64 extensions) is not supported by Yonah. However, EM64T support is planned for Yonah's successor, Merom . Intel Core Duo consists of two cores, a 2 MiB L2 cache shared by both cores, and an arbiter bus that controls both L2 cache and FSB access. Upcoming steppings of Core Duo processors will also include the ability to disable one core to conserve power. Intel Core Solo is a scaled down version of Core Duo with ''one'' core. Technical specifications Core Duo contains 151 million Transistors , including the shared 2 MiB L2 Cache . Yonah's execution core contains a 12 stage pipeline, forecasted to eventually be able to clock to 2.33–2.50 GHz of maximum frequency. The communication between the L2 cache and both execution cores is handled by an arbitration bus unit, which eliminates cache coherency traffic over the FSB, at the expense of raising the core-to-L2 latency from 10 clock cycles (in the Dothan Pentium M) to 14 clock cycles. The increase in clock frequency offsets the impact of the increased clock cycle latency. The power management components of the core features improved grained thermal control, as well as independent scaling of power between the two cores, resulting in very efficient management of power. Core processors communicate with the system chipset over a 667 MHz (166 MHz Quad-pumped ) FSB, up from 533 MHz used by the fastest Pentium M. Yonah is supported by the 945GM, 945PM and 945GT system chipsets. Core Duo and Core Solo use an FCPGA6 (478-pin) pinout, but due to pin arrangement and new chipset functions are not compatible with any previous Pentium M or Centrino motherboard. Advantages and shortcomings In many categories of performance, Yonah represents an uncharacteristically large improvement forward over its immediate predecessor:
The shortcomings of Yonah are largely inherited from previous Pentium M architectures:
The Yonah platform requires all main-memory transactions to pass through the external Northbridge chipset, increasing latency compared to the AMD's Turion platform. This is a weakness shared by the entire line of Pentium processors (desktop, server, and mobile.) Application tests have proven Yonah to be resilient in the face of main-memory latency. Its L2-cache system is quite effective at hiding that latency from the execution core. Floating point performance, although improved over the previous Pentium M line, remains relatively weak. As multimedia usage becomes more a staple of laptop usage, Core's competitiveness will remain in question. The last criticism, lack of 64-bit support, is made from the standpoint that 64-bit x86 support has been available on other CPUs since 2003, and that a 2006 product should offer some future-proofness. But with the exception of Unix-like OSes, which cater to a different user market, application and device-driver support for 64-bit operating systems is currently at a lower level than for 32-bit operating systems in the consumer retail market until Windows Vista releases, by which time Merom, which will support EM64T, will be available. Also, few if any laptops can accept more than 2 GB of RAM, negating the large physical memory aspect of 64-bit support. Hence, for its intended market (mobile and laptop PCs), the lack of 64-bit support is inconsequential at the moment. For some Apple iMac users, the lack of 64-bit processing may represent a step backwards, as the PowerPC G5 processors used in the iMac G5 lines are 64-bit processors. Similarly, for users who do not intend to upgrade their processor in the short to medium-term, the lack of future-proofness may be a disadvantage. However, the Sossaman processor for servers is based on Yonah and also lacks 64-bit support, and 64-bit support is more important in the server market than on the desktop. For example, Exchange 12 will not support 32-bit operating systems. Clock speed Intel launched the Core Solo and Core Duo chips at CES 2006 . These chips use a processor naming scheme different from their previous chips. A name beginning in 'T' marks a 'performance' part, and a name beginning in 'L' marks a 'low power' part. Those letters are then followed by a four-digit code that is not directly comparable between lines. All chips in the 'Core' line at launch contain 2 MiB of L2 cache (shared between cores in dual-core designs.) The line at launch consisted of {Link without Title} :
SOSSAMAN See Also: Xeon A derivative of Yonah, code-named Sossaman, was released on 14 March 2006 as the Dual-Core Xeon LV. Sossaman is virtually identical to Yonah, except that Sossaman supports dual-socket configurations (for a total of 4 cores.) MEROM See Also: Intel Core Microarchitecture Intel expects to launch the Merom core in summer of 2006 as the successor to '''Yonah'''. Merom will use the Intel Core Microarchitecture , a microarchitecture that is different from that of Pentium M and NetBurst , but features some characteristics of both. While little is known about Merom, Intel has revealed that it is a dual core processor supporting '''Vanderpool''' Virtualization Technology and EM64T , which is Intel's version of AMD64 . According to Intel, Merom's design places emphasis on both high performance and low power consumption. On a performance per watt basis, Intel claims Merom will outperform Yonah by 20%, while maintaining the same battery-life as Yonah. Intel has stated that Merom will be drop-in compatible with the current '''Yonah''' platform, requiring at most a BIOS update and having the same thermal envelope. Speculated model numbers for Merom :
CONROE See Also: Intel Core Microarchitecture Conroe is the code name for the desktop version of Merom, and the processor that will replace the Pentium 4 and Pentium D based systems. Conroe will be built on a 65 nm process and is expected to use significantly less power than previous Intel desktop processors — 65 watts or less. Speculated model numbers for Conroe :
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