Digital Core Design
VHDL, Verilog synthesizable and simulation models.

Doulos KnowHow
Designer's guides and models for VHDL and Verilog. SystemC home. Also Perl and Tcl/Tk for hardware designers resources.

ForSyDe
The ForSyDe (Formal System Design) methodology has been developed with the objective to move system design to a higher level of abstraction and to bridge the abstraction gap by transformational design refinement.

HDL at Wikipedia
Definitions, resources, and links related to hardware description languages.

Ruby
Ruby is a notation and design discipline intended for the development of regular integrated circuits and similar hardware and software architectures.

Titivillus: Software Development
Links to many programming languages, including several HDLs.